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Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
FEATURES
* One differential LVPECL output * One crystal oscillator interface: 19.6MHz - 28MHz * Output frequency range: 490MHz - 700MHz * VCO range: 490MHz - 700MHz * RMS phase jitter @ 625MHz using a 25MHz reference (1.875MHz - 20MHz): 0.32ps (typical) * 3.3V or 2.5V operating supply * -40C to 85C ambient operating temperature * Available in both standard and lead-free RoHS compliant packages
GENERAL DESCRIPTION
The ICS843081I-01 is an Ethernet Clock Multiplier and a member of the HiPerClocksTM HiPerClockSTM family of high performance devices from ICS. The ICS843081I-01 accepts a crystal reference of 19.6MHz - 28MHz. The ICS843081I-01 has excellent 1ps or lower phase jitter performance, over the 1.875MHz - 20MHz integration range. The ICS843081I-01 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space.
IC S
FREQUENCY EXAMPLE FUNCTION TABLE
Input XTAL (MHz) 20 25 28 M/N (Multiplier) 25 25 25 Output Frequencies (MHz) 500 62 5 700
BLOCK DIAGRAM
OE
PIN ASSIGNMENT
VCCA XTAL_OUT XTAL_IN VEE Q 1 2 3 4 8 7 6 5 VCC Q nQ OE
XTAL_IN
Phase Detector
XTAL_OUT
VCO
490 - 700 MHz
nQ
ICS843081I-01
8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View
M = /25 (fixed)
843081AGI-01
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1
REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
Type Power Input Power Input Pullup Description Analog supply pin. Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Negative supply pin. Output enable pin. When HIGH, Q output is enabled. When LOW, forces Q to HiZ state. LVCMOS/LVTTL interface levels. Differential clock outputs. LVPECL interface levels. Core supply pin.
TABLE 1. PIN DESCRIPTIONS
Number 1 2, 3 4 5 6, 7 8 Name VCCA XTAL_OUT, XTAL_IN VEE OE nQ, Q VCC
Output Power
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN RPULLUP Parameter Input Capacitance Input Pullup Resistor Test Conditions Minimum Typical 4 51 Maximum Units pF k
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
4.6V -0.5V to VCC + 0.5V 50mA 100mA 101.7C/W (0 mps) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC Inputs, VI Outputs, IO Continuous Current Surge Current Package Thermal Impedance, JA Storage Temperature, TSTG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 3.3V 5%, TA = -40C TO 85C
Symbol VCC VCCA ICC ICCA IEE Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Power Supply Current Test Conditions Minimum 3.135 3.135 Typical 3.3 3.3 72 12 78 Maximum 3.465 3.465 Units V V mA mA mA
TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 2.5V 5%, TA = -40C TO 85C
Symbol VCC VCCA ICC ICCA IEE Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Power Supply Current Test Conditions Minimum 2.375 2.375 Typical 2.5 2.5 60 12 73 Maximum 2.625 2.625 Units V V mA mA mA
TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VCC = VCCA = 3.3V 5% OR 2.5V 5%, TA = -40C TO 85C
Symbol VIH VIL IIH IIL Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current Test Conditions VCC = 3.3V VCC = 2.5V VCC = 3.3V VCC = 2.5V VCC = VIN = 3.465V or 2.625V VCC = 3.465V or 2.625V, VIN = 0V -150 Minimum 2 1.7 -0.3 -0.3 Typical Maximum VCC + 0.3 VCC + 0.3 0.8 0.7 5 Units V V V V A A
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
Test Conditions Minimum VCC - 1.4 VCC - 2.0 0.6 Typical Maximum VCC - 0.9 VCC - 1.7 1.0 Units V V V
TABLE 3D. LVPECL DC CHARACTERISTICS, VCC = VCCA = 3.3V 5% OR 2.5V 5%, TA = -40C TO 85C
Symbol VOH VOL VSWING Parameter Output High Voltage; NOTE 1 Output Low Voltage; NOTE 1 Peak-to-Peak Output Voltage Swing
NOTE 1: Outputs terminated with 50 to VCC - 2V.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level 19.6 Test Conditions Minimum Typical Fundamental 28 50 7 1 MHz pF mW Maximum Units
TABLE 5A. AC CHARACTERISTICS, VCC = VCCA = 3.3V 5%, TA = -40C TO 85C
Symbol fOUT t jit(O) t R / tF Parameter Output Frequency RMS Phase Jitter (Random); NOTE 1 Output Rise/Fall Time Test Conditions 625MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% Minimum 490 0.32 125 45 600 55 Typical Maximum 700 Units MHz ps ps %
odc Output Duty Cycle XTAL = 25MHz NOTE 1: Please refer to the Phase Noise Plot following this section.
TABLE 5B. AC CHARACTERISTICS, VCC = VCCA = 2.5V 5%, TA = -40C TO 85C
Symbol fOUT t jit(O) t R / tF Parameter Output Frequency RMS Phase Jitter (Random); NOTE 1 Output Rise/Fall Time Test Conditions 625MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% Minimum 490 0.39 125 45 650 55 Typical Maximum 700 Units MHz ps ps %
odc Output Duty Cycle XTAL = 25MHz NOTE 1: Please refer to the Phase Noise Plot following this section.
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
TYPICAL PHASE NOISE
AT
-10 -20 -30 -40 -50 -60
Gb Ethernet Filter 625MHz
RMS Phase Jitter (Random) 1.875MHz to 20MHz = 0.32ps (typical)
0
625MHZ @ 3.3V
NOISE POWER dBc Hz
-70 -80
Raw Phase Noise Data
-90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 200 10 100 1k
Phase Noise Result by adding a Gb Ethernet Filter to raw data
10k 100k 1M 10M 100M
OFFSET FREQUENCY (HZ)
-10 -20 -30 -40 -50 -60 -70 -80
Gb Ethernet Filter 625MHz
RMS Phase Jitter (Random) 1.875MHz to 20MHz = 0.39ps (typical)
0
TYPICAL PHASE NOISE
AT
625MHZ @ 2.5V
NOISE POWER dBc Hz
Raw Phase Noise Data
-90 -100 -110 -120 -130 -140 -150 -170 -180 -190 200 10 100 1k -160
Phase Noise Result by adding a Gb Ethernet Filter to raw data
10k 100k 1M 10M 100M
REV. B JANUARY 23, 2006
OFFSET FREQUENCY (HZ)
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Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
PARAMETER MEASUREMENT INFORMATION
2V 2V
VCC , VCCA
Qx
SCOPE
VCC, VCCA
Qx
SCOPE
LVPECL
nQx
LVPECL
nQx
VEE
VEE
-1.3V 0.165V
-0.5V 0.125V
3.3V OUTPUT LOAD AC TEST CIRCUIT
2.5V OUTPUT LOAD AC TEST CIRCUIT
Phase Noise Plot
Noise Power
80% Clock Outputs
80% VSW I N G
Phase Noise Mask
20% tR tF
20%
f1
Offset Frequency
f2
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS PHASE JITTER
OUTPUT RISE/FALL TIME
nQ Q
t PW
t
PERIOD
odc =
t PW t PERIOD
x 100%
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS843081I-01 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VCC and VCCA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 resistor along with a 10F and a .01F bypass capacitor should be connected to each VCCA pin. The 10 resistor can also be replaced by a ferrite bead.
3.3V or 2.5V VCC .01F 10
V CCA .01F 10F
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS843081I-01 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using an 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts.
XTAL_OUT C1 33p X1 18pF Parallel Crystal XTAL_IN C2 22p
ICS843081I-01
Figure 2. CRYSTAL INPUt INTERFACE
843081AGI-01
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
to drive 50 transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 3A and 3B show two different layouts which are recommended only as guidelines. Other suitable clock layouts may exist and it would be recommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations.
TERMINATION FOR 3.3V LVPECL OUTPUT
The clock layout topology shown below is a typical termination for LVPECL outputs. The two different layouts mentioned are recommended only as guidelines. FOUT and nFOUT are low impedance follower outputs that generate ECL/LVPECL compatible outputs. Therefore, terminating resistors (DC current path to ground) or current sources must be used for functionality. These outputs are designed
3.3V
Zo = 50 FOUT FIN
125 Zo = 50 FOUT
50 50 VCC - 2V RTT
125
Zo = 50
FIN
Zo = 50 84 84
1 RTT = Z ((VOH + VOL) / (VCC - 2)) - 2 o
FIGURE 3A. LVPECL OUTPUT TERMINATION
FIGURE 3B. LVPECL OUTPUT TERMINATION
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
ground level. The R3 in Figure 4B can be eliminated and the termination is shown in Figure 4C.
TERMINATION FOR 2.5V LVPECL OUTPUT
Figure 4A and Figure 4B show examples of termination for 2.5V LVPECL driver. These terminations are equivalent to terminating 50 to VCC - 2V. For VCC = 2.5V, the VCC - 2V is very close to
2.5V
2.5V 2.5V VCC=2.5V R1 250 Zo = 50 Ohm + Zo = 50 Ohm 2,5V LVPECL Driv er R2 62.5 R4 62.5 R3 250
VCC=2.5V Zo = 50 Ohm + Zo = 50 Ohm 2,5V LVPECL Driv er R1 50 R2 50
R3 18
FIGURE 4A. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 4B. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
2.5V VCC=2.5V Zo = 50 Ohm + Zo = 50 Ohm 2,5V LVPECL Driv er R1 50 R2 50
FIGURE 4C. 2.5V LVPECL TERMINATION EXAMPLE
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843081I-01. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS843081I-01 is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results. NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
* *
Power (core)MAX = VCC_MAX * IEE_TYP = 3.465V * 78mA = 270.27mW Power (outputs)MAX = 30mW/Loaded Output pair
Total Power_MAX (3.465V, with all outputs switching) = 270.27mW + 30mW = 300.27mW
2. Junction Temperature. Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The maximum recommended junction temperature for HiPerClockSTM devices is 125C. The equation for Tj is as follows: Tj = JA * Pd_total + TA Tj = Junction Temperature JA = Junction-to-Ambient Thermal Resistance Pd_total = Total Device Power Dissipation (example calculation is in section 1 above) TA = Ambient Temperature In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance JA must be used. Assuming a moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5C/W per Table 6 below. Therefore, Tj for an ambient temperature of 85C with all outputs switching is: 85C + 0.300W * 90.5C/W = 112C. This is below the limit of 125C. This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE JA FOR 8-PIN TSSOP, FORCED CONVECTION
JA by Velocity (Meters per Second)
0
Multi-Layer PCB, JEDEC Standard Test Boards 101.7C/W
1
90.5C/W
2.5
89.8C/W
843081AGI-01
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
3. Calculations and Equations. The purpose of this section is to derive the power dissipated into the load. LVPECL output driver circuit and termination are shown in Figure 5.
VCC
Q1
VOUT RL 50 VCC - 2V
FIGURE 5. LVPECL DRIVER CIRCUIT AND TERMINATION
To calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of V - 2V.
CC
*
For logic high, VOUT = V (V
CCO_MAX
OH_MAX
=V
CC_MAX
- 0.9V
-V
OH_MAX
) = 0.9V =V - 1.7V
*
For logic low, VOUT = V (V
CCO_MAX
OL_MAX
CC_MAX
-V
OL_MAX
) = 1.7V
Pd_H is power dissipation when the output drives high. Pd_L is the power dissipation when the output drives low. Pd_H = [(V
OH_MAX
- (V
CC_MAX
- 2V))/R ] * (V
L
CC_MAX
-V
OH_MAX
) = [(2V - (V
CC_MAX
-V
OH_MAX
))/R ] * (V
L
CC_MAX
-V
OH_MAX
)=
[(2V - 0.9V)/50] * 0.9V = 19.8mW
Pd_L = [(V
OL_MAX
- (V
CC_MAX
- 2V))/R ] * (V
L
CC_MAX
-V
OL_MAX
) = [(2V - (V
CC_MAX
-V
OL_MAX
))/R ] * (V
L
CC_MAX
-V
OL_MAX
)=
[(2V - 1.7V)/50] * 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER RELIABILITY INFORMATION
TABLE 7. JAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
JA by Velocity (Meters per Second)
0
Multi-Layer PCB, JEDEC Standard Test Boards 101.7C/W
1
90.5C/W
2.5
89.8C/W
TRANSISTOR COUNT
The transistor count for ICS843081I-01 is: 1697
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
8 LEAD TSSOP
PACKAGE OUTLINE - G SUFFIX
FOR
TABLE 8. PACKAGE DIMENSIONS
SYMBOL N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 8 1.20 0.15 1.05 0.30 0.20 3.10 Maximum
Reference Document: JEDEC Publication 95, MO-153
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
Marking 1AI01 1AI01 AI01L AI01L Package 8 lead TSSOP 8 lead TSSOP 8 lead "Lead-Free" TSSOP 8 lead "Lead-Free" TSSOP Shipping Packaging tube 2500 tape & reel tube 2500 tape & reel Temperature -40C to 85C -40C to 85C -40C to 85C -40C to 85C
TABLE 9. ORDERING INFORMATION
Part/Order Number ICS843081AGI-01 ICS843081AGI-01T ICS843081AGI-01LF ICS843081AGI-01LFT
NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 843081AGI-01
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REV. B JANUARY 23, 2006
Integrated Circuit Systems, Inc.
ICS843081I-01
FEMTOCLOCKSTM CRYSTAL-TO3.3V, 2.5V LVPECL CLOCK MULTIPLIER
REVISION HISTORY SHEET
Rev
Table T5A
Page 1 4 4 5 14
B
T5B
T9
Description of Change Features Section - corrected RMS Phase Jitter value. 3.3V AC Characteristics Table - changed RMS Phase Jitter from 0.26ps typical to 0.32ps typical. 2.5V AC Characteristics Table - changed RMS Phase Jitter from 0.27ps typical to 0.39ps typical. Updated Typical Phase Noise Plots. Ordering Information Table - added lead-free marking.
Date
1/23/06
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